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<junari> electricworry: I build the package using makepkg and PKGBUILD, specifying local storage of the source files. The build is fast, as the compilation only affects the modified files. After that, the compiled package is sent to the device and installed via pacman -U
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<dlan> junari: btw, do you plan to work on EMAC1 of A523/527 for mainline? your patch actually works
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<junari> dlan: don't have much time to prepare that for mainline
<junari> So far there has been no review of the code that was sent for the thermal system, so I don't see the need to move forward with it
<junari> Where do you keep the code? I don't have radxa but would like to add it to my linux branch for manjaro. It would be nice to add the tested part
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<dlan> only tested locally.. need to refactor before push out
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<junari> If you want to get into finalizing the patch for emac1 and sending it to mainline, no problem. Most of my work was testing and porting allwinner code and adapting dtsi nodes for mainline
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<dlan> there is no problem with current patch which will break emac0, since they share 'sram register space', need to do same as emac0 to use regmap interface
<dlan> I haven't decided to work it in near future, a little bit busy now..
<dlan> s/no problem/one problem/
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<apritzel> dlan: junari: so I am not sure massaging this BSP driver is a good way forward for EMAC1 support. Does that build on the stmmac driver in any way? Can someone point me to some code?
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<apritzel> which aligns with what wens already hinted at: that the code might be already there, we just need to use / activate it?
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<apritzel> junari: thanks, so that doesn't look too bad, that's actually mostly platform glue, the actual MAC code is entirely using the existing stmmac code. But the platform code needs some adjustments
<MasterR3C0RD> apritzel: Sorry for the lag on signing off the patch, and again thank you for the cleanup. Should still be around for any questions if they come up
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<apritzel> MasterR3C0RD: no worries, and thanks for the reply and the line!
<apritzel> junari: I am pretty sure the whole emac_25m code can go. Despite its name, that's the clock for the PHY, fed out on a SoC pin, allowing to save the 25MHz crystal you typically need
<apritzel> and I actually wonder: if the vast majority of that code is platform glue, which it probably shares with dwmac-sun8i, can't we just integrate both?
<Lightsword> apritzel, is emac_25m related to the emac1 phy pwm clock?
<apritzel> Lightsword: they can serve the same purpose: provide a clock to some out-of-SoC component. emac_25m is a dedicated and fixed 25MHz clock, which the PWM clock is more variable
<apritzel> I think the H6 and earlier didn't have emac_25m, hence the re-purposing of the PWM clock
<Lightsword> apritzel, something weird I noticed is that apparently the AC200 can be configured to accept 24MHz or 27MHz clocks while the AC300 can do 24MHz, 25MHz or 27MHz AFAICT
<Lightsword> those pwm patches for the h616 don't have working bypass support btw, was trying to fix it but it's a bit confusing how best to handle it especially when it comes to getting the code that reads back the clock settings working correctly
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<apritzel> Lightsword: have you looked at pwm-sun4i.c and its bypass detection? https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pwm/pwm-sun4i.c#n169
<Lightsword> apritzel, ah, no I hadn't, should that implementation be basically the same?
<apritzel> I guess so? But the code needs to be adjusted, to more explicitly check for 24 MHz @ 50%, as the new PWM can also have a higher input clock
<apritzel> so I think what this means is that it's OK to do those explicit checks, even though they don't seem to be very elegant
<macromorgan> so has anyone looked at the PWM on the H616 series? Based on the documents it's almost like I'm forced to conclude that there's no PWM0 or PWM5... there's a PWM1_inverse, a PWM1, a PWM2, a PWM3, a PWM4, and a PWM4_inverse. I say these "inverse" because I can still actually get the output of *something* for PWM0, it just so happens to be the opposite of PWM1
<apritzel> macromorgan: there *is* PWM0 and PWM5, there are just no pins for them on the H616
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<macromorgan> there's also a missing clk_src_bypass_to_pwm0 or pwm5 in the register sheet
<apritzel> but the T507 manual mentions them, and in fact PWM5 is connected to an internal pin going to the AC200/AC300
<macromorgan> okay, I'll just asume the H616 register docs might be wrong or incomplete?
<macromorgan> honestly not even sure what the clock bypass is needed for
<macromorgan> just want to make sure I'm doing this right is all
<apritzel> well, they just cover what's usable on the H616, and since there is no pin for PWM0, it's not mentioned
<macromorgan> fair enough
<apritzel> but it's the same die as the T507, so the registers are there
<macromorgan> since I don't have an H700 document I guess that's what I get for trying to "read between the lines"
<apritzel> I think T507 is the closest to the H700 you can get
<apritzel> yeah, somewhat. From my experience, T507 is the most complete package of the die, so consider this a superset of the H616
<apritzel> "clock bypass" refers to bypassing the duty-cycle generator, so the output waveform is the same as the input clock waveform (with I guess 50% duty cycle)
<apritzel> macromorgan: which isn't terribly interesting for classic PWM use cases, but can be used to have somewhat high clock rate on output pins, as is used for clocking the internal PHYs already
<macromorgan> okay
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<apritzel> macromorgan: I just checked, the T507 and H700 come in the exact same package, so chances are they are just relabelled versions of other, the T version maybe extra qualified for automotive
<macromorgan> right... I'm just going to include in the notes what I'm reading about no channel 0 or 5.
<apritzel> macromorgan: are you preparing a v2 series, based on Alexandr's D1 series? Any chance we can merge this, Uwe already hinted at that a while ago: https://lore.kernel.org/linux-sunxi/d5mr73yc7l6w6uvgqb4ymyc5267do4zirnnorkpi5s6qa5vckk@owayit4mexk2/
<macromorgan> yes, I'm working within the series for the D1 right now
<macromorgan> the real major change between the two is that the register offsets are different and the gating register for the H616 is part of the clock control register rather than a seperate gating register
<macromorgan> otherwise it's identical
<apritzel> I know, I looked at that ages ago, and figured the same
<apritzel> there is one more difference: the H616 register layout limits the channels to 8, not 16, but that's really a nit
<apritzel> and just a heads up: I am just about to review the D1 patch ...
<macromorgan> okay
<macromorgan> right, the H616 technically only has 6 anyway (well 4 for the H616, 6 for the T507 and H700)
<apritzel> I don't think we should be too stingy with that number, really, the driver can happily address 4 pairs/ 8 channels. If people deliberately access a wrong one, it's their fault, I'd say
<macromorgan> the D1 series accepts a devicetree value of allwinner,npwms and hard limits the max to 16
<macromorgan> though honestly I'm shocked that someone so far hasn't yelled and said "put the limit in the driver and not the devicetree"
<macromorgan> I'm not saying anything because I want it upstreamed :-P
<apritzel> there is a check, but it's a toothless tiger, since it just warns. I have just written a comment on this
<apritzel> yeah, don't worry, I am doing ;-)
<apritzel> macromorgan: just looking at the A523: that implements all 16 channels, it seems
<macromorgan> overachiever
<apritzel> well, it also puts a question mark on this default value of 8
<macromorgan> personally I think it should be in the driver data, but that's just me
<apritzel> don't understand as well why we are so specific: the register layout sets a limit, the driver and binding should just describe that
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<apritzel> macromorgan: but then you would need different compatible strings for each chip, which sounds pointless, as it's essentially the same IP, just configured differently
<macromorgan> sort of, if the register layout *and* npwms is the same you'd just need a fallback string
<macromorgan> but yeah otherwise you'd need different strings
<apritzel> which forward looking is a pain, because you need to touch the driver for every new variant, and just to add that number
<apritzel> if you leave that to the DT, it would even work with older kernels
<macromorgan> okay
<Lightsword> macromorgan, I have a branch here with some of the PWM h616 patches from the LKML https://github.com/jameshilliard/linux-h616/commits/pwm/
<macromorgan> hehe... that looks almost identical to what I've got so far
<apritzel> ... but I think the consensus on patch 5/5 is that the approach is not right?
<Lightsword> macromorgan, does yours have bypass mode working?
<macromorgan> not yet, I'm still modifying things
<macromorgan> I have to take my kids to gymnastics in a bit, so I likely won't be finished until tomorow, and even then that'll just be a compile test and to see if I can make an LED breathe
<Lightsword> macromorgan, have a branch pushed somewhere?
<apritzel> there is no rush really, clearly the v6.16 train has left already, so we have another like 4 weeks till -rc1 as the next best posting opportunity
<apritzel> and combining the two series in this rather naive way will not fly (but you probably know this)
<Lightsword> apritzel, all these different WIP patch sets doing similar things is def confusing
<Lightsword> I think on my boards the pwm's are also used for controlling fans or something
<apritzel> yes, it's a bit of a mess, but I think we can make this right
<apritzel> and LEDs and fans are the actual users of PWMs, normally. This bypassing PHY clock is just a typical Allwinner hack ...
<apritzel> just saw that the V853 uses the same IP, but with 12 channels
<macromorgan> I just want it for a backlight and maybe a haptic motor
<apritzel> PWM is genuinely useful, and be it for fading LEDs ;-)
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