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<MasterR3C0RD>
iscle: If the code you see is similar to that sun50iw10 (AKA A133) init code, it's definitely not DWC, but Innosilicon
<MasterR3C0RD>
Though that file you linked to is very very VERY interesting; I haven't seen that in SyterKit before. Actual DRAM init code for the A133?
<MasterR3C0RD>
Ahhh wait, I see now; it's decompiled in Ghidra
<MasterR3C0RD>
Fascinating nonetheless
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<MasterR3C0RD>
iscle: To be more specific the MCTL_CTL block could still be the same DWC as the H616/A133/A523, but if there's a `phy_para_config` function that looks similar to that A133 code, you're probably looking at Innosilicon. If it's loading a training firmware (which boot logs suggest), could be DWC (they've been doing that for a while)
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<iscle>
MasterR3C0RD: The code was similar at first, but after checking mctl_channel_init, everything appears to be quite different. I guess the first part of the code is just generic allwinner's, and everything inside mctl_channel_init is from the IP core itself
<iscle>
That one was for LPDDR4, but it has symbols and the printf calls and code structure matches the one in A733, although when we start getting into more specific stuff it starts to differ, probably because DDR5 is much different from DDR4
<iscle>
What I'm decompiling in ghidra is the final compiled boot0 code, without symbols and with optimizations enabled, so I'm being guided by the strings and structure/function calls
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<iscle>
There are some functions which are 5000+ lines long...
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<Lightsword>
"iscle: If the code you see is similar to that sun50iw10 (AKA A133) init code, it's definitely not DWC, but Innosilicon" heh, I know some of they guys that worked there(I rewrote their bitcoin miner firmware build system a while back)