<apritzel>
lschmid: ah, so I think the SPC actually works, just filling it all with 0xff's wasn't helpful
<apritzel>
so first: newer SoCs use a stride of 16, not 12. The status register is at 0x0, the set reg at 0x4, the clear reg at 0x8
<apritzel>
now if you now write 0xff to every register, you will first set all bits, but then clear them again, because clear comes after set
<apritzel>
which mean it's all still zero
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<apritzel>
so can you write 0xffffffff to +0x4, +0x14, +0x24 and so on? I could verify that the OR/NAND logic is implemented for 14 banks (up to 0xd4, but 0xe4 does not work)
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<wens>
interesting, on one boot my cubie a5e detected 8GB ram
<apritzel>
wens: well, that's an "old" problem, I'd say, and we fixed that on the H616 and A133, but I didn't want to touch the A523 code again so close before the PR
<apritzel>
so if someone wants to port over 380802938673 and 40c687aef01fd ...
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<apritzel>
wens: or the quick solution: just reboot ;-)
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<wens>
apritzel: btw, I wanted to introduce the syscon+index format with the gmac200 binding, wdyt?
<apritzel>
I dimly remember there was some pushback back then, and we don't really need it, do we? Since it's a new compatible, you could just put the 0x34 in the struct in the driver
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<wens>
yeah, but then we can't fall back to it for newer chips, or end up with two compatibles if an SoC has two gmac200 blocs
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<lschmid>
apritzel: Yes, Linux starts now in secure mode!!! I wrote to all 14 banks and now it boots
<lschmid>
Or rather we see it boot now
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<lschmid>
I managed to hack in the writes to board_late_init and linux and simple_guest boot successfully now. Ethernet works too. But we still only have one CPU, the other "failed to come online"
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<apritzel>
lschmid: what does the kernel say in the boot log when it tries to bring the other core online?
<apritzel>
I wonder in general if PSCI is broken on the T113, because I don't see how we protect U-Boot's secure monitor/PSCI handler code and data from being overwritten by the kernel
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