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<MoeIcenowy>
junari: interesting, pck-600 looks like some generic ARM IP
<MoeIcenowy>
they have a spec for this
<MoeIcenowy>
oops the 0xc00 registers are not standard
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<paulk>
btw I'd like to reparent the CSI and ISP clocks to the ISP PLL instead of the video PLL (which is shared with DE and used to generate pixel clock) on V3/V3s
<paulk>
Is that better done in the clock driver's probe function?
<paulk>
IIRC there was a debate about where clock reparenting should happen
<paulk>
(when I say that I'd like to do this, I mean for upstream)