#asahi-dev on 2025-09-08 — irc logs at oftc.catirclogs.org

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10:41 <nickchan> maz: this might be stretching it but do you think you can take a7-a11's cpu pmu (patch 1-12) through kvmarm? it is your driver and you actually have apple silicon hardware after all. if one squint really hard then patch 2 mentions EL2 so it's not /completely/ off-topic: https://lore.kernel.org/asahi/20250908-apple-cpmu-v8-0-d83b4544dc14@gmail.com/

10:41 <nickchan> there's some addressed review comments on v7's resend https://lore.kernel.org/asahi/20250616-apple-cpmu-v7-0-df2778a44d5c@gmail.com/

10:41 <nickchan> (currently on v8 resend)

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10:48 <maz> nickchan: no, that's not something I can do. Will is the maintainer for this, and I cannot bypass him that way.

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11:00 <nickchan> ah alright then was looking at how FEAT_PMUv3 in kvm series is handled but it turns out that series did have some discussion about how things to be taken

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11:00 <nickchan> in v1 so not the same case

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16:43 <sven> the 5s delay looks more and more like an xhci quirk to me

16:44 <sven> with quite some hacks I can get the MMIO trace to essentially match macOS and yet I still see it

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16:49 <chaos_princess> you mean it is a difference between how the oses program the dwc3 core, not the phy?

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16:50 <sven> yeah, probably even the xhci part of dwc3

16:51 <sven> cause I don’t see a difference anymore and I don’t see the 5s delay on Mac OS

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