<MoeIcenowy>
maybe bool flags instead of new words should be added
<austriancoder>
MoeIcenowy: in Mesa we are using a different approach - hwdb. Oh and these chip features are not copied from a random converter but galcore used them too
<austriancoder>
marex: got the hw.. will have a look
<marex>
austriancoder: mp2 ?
<MoeIcenowy>
austriancoder: I think new galcore uses hwdb too?
<MoeIcenowy>
and I think only a few chipMinorFeatures words are really backed by Vivante
<MoeIcenowy>
others are random allocations (because galcore used hwdb
<MoeIcenowy>
BTW according to my reading of the vivante kernel driver, do they only use PTA table id 0?
<MoeIcenowy>
(on my GC620 r5552 setup, only pta table id 0 works reliably, other ids all fail
<MoeIcenowy>
despite I saw some document says 0x00394 register is "MMU_REG_TABLE_ARRAY_SIZE", writing non-0-or-1 values still do not make other pta table ids work (although the id 0 still work)
<austriancoder>
MoeIcenowy: older glacore used the feature regs only.
<MoeIcenowy>
well temporarily this could be just connected to GC620 r5552, for the quirk workaround
<MoeIcenowy>
well for the page table id 0 only, I tried to set the first page table id to 16, and it still works once (and fail when trying to switch to page table 17